2019-03-22 15:06:59 +00:00
|
|
|
#include <avr/io.h>
|
2019-03-25 12:00:22 +00:00
|
|
|
#include <avr/interrupt.h>
|
|
|
|
#include <util/delay.h>
|
2019-03-25 14:02:24 +00:00
|
|
|
#include <avr/wdt.h>
|
2019-03-26 07:44:30 +00:00
|
|
|
#include "global_vars.h"
|
2019-03-25 15:15:00 +00:00
|
|
|
#include "selftest.h"
|
2019-03-26 14:02:58 +00:00
|
|
|
#include "requests.h"
|
2019-03-25 12:00:22 +00:00
|
|
|
|
|
|
|
|
2019-03-29 14:07:36 +00:00
|
|
|
#define WDT_TIMEOUT WDTO_15MS
|
2019-03-25 14:02:24 +00:00
|
|
|
|
2019-04-02 08:59:37 +00:00
|
|
|
ISR(USART0_RX_vect)
|
|
|
|
{
|
|
|
|
if(UCSR0A & _BV(DOR0))
|
|
|
|
{
|
|
|
|
((MCP23S17*) &beba0)->writePortA(0xFF);
|
|
|
|
}
|
|
|
|
cli();
|
|
|
|
((USART*) &usart)->nextByte(UDR0);
|
|
|
|
sei();
|
|
|
|
}
|
|
|
|
|
2019-03-25 15:15:00 +00:00
|
|
|
void initAll()
|
2019-03-25 14:02:24 +00:00
|
|
|
{
|
2019-04-02 08:59:37 +00:00
|
|
|
((SPI*) &spi)->init();
|
2019-03-25 15:15:00 +00:00
|
|
|
|
2019-04-02 08:59:37 +00:00
|
|
|
((MCP23S17*) &beba0)->setDirA(0x00); // alle Ausgang
|
|
|
|
((MCP23S17*) &beba0)->setDirB(0xFF); // alle Eingang
|
|
|
|
((MCP23S17*) &beba1)->setDirA(0x00); // alle Ausgang
|
|
|
|
((MCP23S17*) &beba1)->setDirB(0xFF); // alle Eingang
|
|
|
|
((MCP23S17*) &sw)->setDirB(0xFF); // alle Eingang
|
2019-03-25 14:40:36 +00:00
|
|
|
|
2019-04-02 08:59:37 +00:00
|
|
|
((ADU*) &adu)->init();
|
|
|
|
((USART*) &usart)->init();
|
2019-03-26 15:30:49 +00:00
|
|
|
|
|
|
|
// aktiviere Interrupts
|
|
|
|
sei();
|
2019-03-27 08:18:38 +00:00
|
|
|
|
2019-03-28 12:32:24 +00:00
|
|
|
// deaktiviere WDT VOLLSTAENDIG
|
|
|
|
MCUSR &= ~_BV(WDRF);
|
|
|
|
WDTCSR = 0;
|
|
|
|
wdt_disable();
|
2019-03-27 09:33:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void handleRequest()
|
|
|
|
{
|
2019-03-28 12:32:24 +00:00
|
|
|
wdt_disable();
|
|
|
|
|
2019-04-02 08:59:37 +00:00
|
|
|
((MCP23S17*) &beba1)->writePortA(0xFF);
|
|
|
|
const uint8_t req = ((USART*) &usart)->readByte();
|
|
|
|
((MCP23S17*) &beba1)->writePortA(0x00);
|
2019-03-26 14:02:58 +00:00
|
|
|
|
2019-03-28 12:32:24 +00:00
|
|
|
// starte WDT
|
|
|
|
wdt_enable(WDT_TIMEOUT);
|
|
|
|
wdt_reset();
|
|
|
|
|
2019-03-26 14:02:58 +00:00
|
|
|
switch(req)
|
|
|
|
{
|
|
|
|
case RQ_DISC:
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RQ_TEST:
|
|
|
|
rqTestConnection();
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RQ_INFO:
|
|
|
|
rqBoardInfo();
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RQ_INT:
|
|
|
|
rqTestIntConv();
|
|
|
|
break;
|
|
|
|
|
2019-03-26 15:30:49 +00:00
|
|
|
case RQ_BA0:
|
|
|
|
rqDigitalWrite0();
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RQ_BA1:
|
|
|
|
rqDigitalWrite1();
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RQ_BE0:
|
|
|
|
rqDigitalRead0();
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RQ_BE1:
|
|
|
|
rqDigitalRead1();
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RQ_AA0:
|
|
|
|
rqAnalogWrite0();
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RQ_AA1:
|
|
|
|
rqAnalogWrite1();
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RQ_ADC:
|
|
|
|
rqAnalogRead();
|
|
|
|
break;
|
2019-03-27 09:33:26 +00:00
|
|
|
|
|
|
|
case RQ_ADC_DAC_STROKE:
|
|
|
|
rqAdcDacStroke();
|
|
|
|
break;
|
2019-03-26 15:30:49 +00:00
|
|
|
|
2019-03-26 14:02:58 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
2019-03-25 15:15:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int main()
|
|
|
|
{
|
|
|
|
|
|
|
|
initAll();
|
2019-03-26 15:30:49 +00:00
|
|
|
|
2019-03-28 14:36:53 +00:00
|
|
|
|
2019-03-28 12:32:24 +00:00
|
|
|
// Reset anzeigen
|
2019-04-02 08:59:37 +00:00
|
|
|
((MCP23S17*) &beba0)->writePortA(0xFF);
|
2019-03-28 12:32:24 +00:00
|
|
|
_delay_ms(100);
|
2019-04-02 08:59:37 +00:00
|
|
|
((MCP23S17*) &beba0)->writePortA(0x00);
|
2019-03-28 12:32:24 +00:00
|
|
|
|
2019-04-01 06:37:00 +00:00
|
|
|
uint8_t n = 0;
|
|
|
|
uint8_t block[16];
|
|
|
|
while(1)
|
|
|
|
{
|
2019-04-02 08:59:37 +00:00
|
|
|
//testAll();
|
|
|
|
_delay_ms(1);
|
2019-04-01 06:37:00 +00:00
|
|
|
}
|
|
|
|
|
2019-03-25 14:02:24 +00:00
|
|
|
while(1)
|
|
|
|
{
|
2019-03-26 10:35:41 +00:00
|
|
|
handleRequest();
|
2019-03-25 12:00:22 +00:00
|
|
|
}
|
|
|
|
|
2019-03-22 14:51:52 +00:00
|
|
|
return 0;
|
|
|
|
}
|