2019-06-21 12:09:50 +00:00
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#ifndef REQUESTS_H
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#define REQUESTS_H
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2019-06-21 12:31:14 +00:00
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constexpr static uint8_t RQ_DISCARD = 0;
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constexpr static uint8_t RQ_TEST = 1;
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constexpr static uint8_t RQ_INFO = 2;
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constexpr static uint8_t RQ_INT_TEST = 3;
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constexpr static uint8_t RQ_SELF_TEST = 4;
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constexpr static uint8_t RQ_DIGITAL_WRITE_0 = 5;
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constexpr static uint8_t RQ_DIGITAL_WRITE_1 = 6;
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2019-06-21 12:37:42 +00:00
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constexpr static uint8_t RQ_DIGITAL_READ_0 = 7;
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constexpr static uint8_t RQ_DIGITAL_READ_1 = 8;
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constexpr static uint8_t RQ_READ_DIP_SWITCH = 9;
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constexpr static uint8_t RQ_ANALOG_WRITE_0 = 10;
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constexpr static uint8_t RQ_ANALOG_WRITE_1 = 11;
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constexpr static uint8_t RQ_ANALOG_READ = 12;
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2019-06-21 12:31:14 +00:00
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constexpr static uint8_t RQ_ADC_DAC_STROKE = 13;
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constexpr static uint8_t RQ_PWM_SET_FREQ = 14;
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constexpr static uint8_t RQ_PWM_SET_VALUE = 15;
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2019-06-21 12:37:42 +00:00
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constexpr static uint8_t RQ_SET_REGISTER = 16;
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constexpr static uint8_t RQ_GET_REGISTER = 17;
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2019-06-21 12:09:50 +00:00
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uint8_t const rq_len[] = {
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/* RQ_DISC */ 1,
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/* RQ_TEST */ 2,
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/* RQ_INFO */ 1,
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/* RQ_INT */ 3,
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/* RQ_ST */ 1,
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/* RQ_BA0 */ 2,
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/* RQ_BA1 */ 2,
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/* RQ_BE0 */ 1,
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/* RQ_BE1 */ 1,
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/* RQ_DSW */ 1,
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/* RQ_AA0 */ 3,
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/* RQ_AA1 */ 3,
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/* RQ_ADC */ 2,
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/* RQ_ADC_DAC_STROKE */ 9,
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/* RQ_PWM_SET_FREQ */ 5,
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/* RQ_PWM_SET_VALUE */ 2,
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/* RQ_SET_REG */ 3,
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/* RQ_GET_REG */ 2
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};
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#endif // REQUESTS_H
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