turned instruction set into static array
This commit is contained in:
Lauchmelder
parent
95bf1d2078
commit
db58681074
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@ -24,6 +24,23 @@ impl CPU
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print!("{: <30}", "A");
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}
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pub fn idx(&mut self)
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{
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let bus = self.bus.upgrade().unwrap();
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let mut zpg_addr = bus.borrow().read_cpu(self.pc);
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self.pc += 1;
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zpg_addr = zpg_addr.wrapping_add(self.x);
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let lo = bus.borrow().read_cpu(zpg_addr as u16) as u16;
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let hi = bus.borrow().read_cpu(zpg_addr.wrapping_add(1) as u16) as u16;
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self.absolute_addr = (hi << 8) | lo;
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self.fetch_type = FetchType::Mem;
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print!("{: <30}", format!("(${:02X},X) @ [${:02X}] = ${:04X} = {:02X}", zpg_addr.wrapping_sub(self.x), zpg_addr, self.absolute_addr, bus.borrow().read_cpu(self.absolute_addr)));
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}
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pub fn imm(&mut self)
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{
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let bus = self.bus.upgrade().unwrap();
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367
src/cpu.rs
367
src/cpu.rs
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@ -1,8 +1,8 @@
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use std::cell::RefCell;
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use std::rc::{Rc, Weak};
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use copystr::s3;
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use crate::bus::Bus;
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use crate::mnemonic::Mnemonic;
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type InstrFn = fn(&mut CPU);
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type AddrFn = fn(&mut CPU);
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@ -15,7 +15,7 @@ struct Instruction
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cycles: u8,
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length: u8,
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name: s3
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name: Mnemonic
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}
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macro_rules! instr
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@ -29,7 +29,7 @@ macro_rules! instr
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cycles: $cyc,
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length: $len,
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name: s3::new(stringify!($instr)).unwrap()
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name: Mnemonic::new(stringify!($instr), false)
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})
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}
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}
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@ -57,90 +57,12 @@ pub struct CPU
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pub pc: u16,
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pub bus: Weak<RefCell<Bus>>,
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instruction_set: [Option<Instruction>; 256]
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}
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impl CPU
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{
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pub fn new(bus: &Rc<RefCell<Bus>>) -> CPU
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{
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const UNDEF_INSTR: Option<Instruction> = None;
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let mut instr_set = [UNDEF_INSTR; 256];
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instr_set[0x08] = instr!(php, imp, 3, 1);
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instr_set[0x09] = instr!(ora, imm, 2, 2);
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instr_set[0x0A] = instr!(asl, acc, 2, 1);
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instr_set[0x10] = instr!(bpl, rel, 2, 2);
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instr_set[0x18] = instr!(clc, imp, 2, 1);
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instr_set[0x20] = instr!(jsr, abs, 6, 3);
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instr_set[0x24] = instr!(bit, zpg, 3, 2);
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instr_set[0x28] = instr!(plp, imp, 4, 1);
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instr_set[0x29] = instr!(and, imm, 2, 2);
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instr_set[0x2A] = instr!(rol, acc, 2, 1);
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instr_set[0x30] = instr!(bmi, rel, 2, 2);
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instr_set[0x38] = instr!(sec, imp, 2, 1);
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instr_set[0x40] = instr!(rti, imp, 6, 1);
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instr_set[0x4A] = instr!(lsr, acc, 2, 1);
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instr_set[0x48] = instr!(pha, imp, 3, 1);
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instr_set[0x49] = instr!(eor, imm, 2, 2);
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instr_set[0x4C] = instr!(jmp, abs, 3, 3);
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instr_set[0x50] = instr!(bvc, rel, 2, 2);
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instr_set[0x60] = instr!(rts, imp, 6, 1);
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instr_set[0x68] = instr!(pla, imp, 4, 1);
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instr_set[0x69] = instr!(adc, imm, 2, 2);
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instr_set[0x6A] = instr!(ror, acc, 2, 1);
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instr_set[0x70] = instr!(bvs, rel, 2, 2);
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instr_set[0x78] = instr!(sei, imp, 2, 1);
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instr_set[0x84] = instr!(sty, zpg, 3, 2);
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instr_set[0x85] = instr!(sta, zpg, 3, 2);
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instr_set[0x86] = instr!(stx, zpg, 3, 2);
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instr_set[0x88] = instr!(dey, imp, 2, 1);
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instr_set[0x8A] = instr!(txa, imp, 2, 1);
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instr_set[0x8D] = instr!(sta, abs, 4, 3);
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instr_set[0x8E] = instr!(stx, abs, 4, 3);
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instr_set[0x90] = instr!(bcc, rel, 2, 2);
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instr_set[0x98] = instr!(tya, imp, 2, 1);
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instr_set[0x9A] = instr!(txs, imp, 2, 1);
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instr_set[0xA0] = instr!(ldy, imm, 2, 2);
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instr_set[0xA2] = instr!(ldx, imm, 2, 2);
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instr_set[0xA5] = instr!(lda, zpg, 3, 2);
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instr_set[0xA8] = instr!(tay, imp, 2, 1);
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instr_set[0xA9] = instr!(lda, imm, 2, 2);
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instr_set[0xAA] = instr!(tax, imp, 2, 1);
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instr_set[0xAD] = instr!(lda, abs, 4, 3);
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instr_set[0xAE] = instr!(ldx, abs, 4, 3);
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instr_set[0xB0] = instr!(bcs, rel, 2, 2);
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instr_set[0xB8] = instr!(clv, imp, 2, 1);
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instr_set[0xBA] = instr!(tsx, imp, 2, 1);
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instr_set[0xC0] = instr!(cpy, imm, 2, 2);
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instr_set[0xC8] = instr!(iny, imp, 2, 1);
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instr_set[0xC9] = instr!(cmp, imm, 2, 2);
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instr_set[0xCA] = instr!(dex, imp, 2, 1);
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instr_set[0xD0] = instr!(bne, rel, 2, 2);
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instr_set[0xD8] = instr!(cld, imp, 2, 1);
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instr_set[0xE0] = instr!(cpx, imm, 2, 2);
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instr_set[0xE8] = instr!(inx, imp, 2, 1);
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instr_set[0xE9] = instr!(sbc, imm, 2, 2);
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instr_set[0xEA] = instr!(nop, imp, 2, 1);
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instr_set[0xF0] = instr!(beq, rel, 2, 2);
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instr_set[0xF8] = instr!(sed, imp, 2, 1);
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CPU {
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cycle: 0,
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total_cycles: 0,
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@ -157,9 +79,7 @@ impl CPU
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pc: 0,
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bus: Rc::downgrade(bus),
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instruction_set: instr_set
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bus: Rc::downgrade(bus)
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}
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}
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@ -198,7 +118,7 @@ impl CPU
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{
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let bus = self.bus.upgrade().unwrap();
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let opcode: u8 = bus.borrow().read_cpu(self.pc);
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let instr = self.instruction_set[opcode as usize].expect(&format!("Unimplemented opcode {:02X}", opcode));
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let instr = INSTRUCTION_SET[opcode as usize].expect(&format!("Unimplemented opcode {:02X}", opcode));
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print!("{:04X} ", self.pc);
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for byte in 0..3
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@ -224,4 +144,279 @@ impl CPU
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println!("A:{:02X} X:{:02X} Y:{:02X} P:{:02X} SP:{:02X} CYC:{}", self.acc, self.x, self.y, self.p, self.sp, self.total_cycles);
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}
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}
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}
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static INSTRUCTION_SET: [Option<Instruction>; 256] = [
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/* 00 */ Option::None,
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/* 01 */ instr!(ora, idx, 6, 2),
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/* 02 */ Option::None,
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/* 03 */ Option::None,
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/* 04 */ Option::None,
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/* 05 */ Option::None,
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/* 06 */ Option::None,
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/* 07 */ Option::None,
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/* 08 */ instr!(php, imp, 3, 1),
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/* 09 */ instr!(ora, imm, 2, 2),
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/* 0A */ instr!(asl, acc, 2, 1),
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/* 0B */ Option::None,
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/* 0C */ Option::None,
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/* 0D */ Option::None,
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/* 0E */ Option::None,
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/* 0F */ Option::None,
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/* 10 */ instr!(bpl, rel, 2, 2),
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/* 11 */ Option::None,
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/* 12 */ Option::None,
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/* 13 */ Option::None,
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/* 14 */ Option::None,
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/* 15 */ Option::None,
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/* 16 */ Option::None,
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/* 17 */ Option::None,
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/* 18 */ instr!(clc, imp, 2, 1),
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/* 09 */ Option::None,
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/* 0A */ Option::None,
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/* 0B */ Option::None,
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/* 0C */ Option::None,
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/* 0D */ Option::None,
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/* 0E */ Option::None,
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/* 0F */ Option::None,
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/* 20 */ instr!(jsr, abs, 6, 3),
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/* 21 */ instr!(and, idx, 6, 2),
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/* 22 */ Option::None,
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/* 23 */ Option::None,
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/* 24 */ instr!(bit, zpg, 3, 2),
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/* 25 */ Option::None,
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/* 26 */ Option::None,
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/* 27 */ Option::None,
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/* 28 */ instr!(plp, imp, 4, 1),
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/* 29 */ instr!(and, imm, 2, 2),
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/* 2A */ instr!(rol, acc, 2, 1),
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/* 2B */ Option::None,
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/* 2C */ Option::None,
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/* 2D */ Option::None,
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/* 2E */ Option::None,
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/* 2F */ Option::None,
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/* 30 */ instr!(bmi, rel, 2, 2),
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/* 31 */ Option::None,
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/* 32 */ Option::None,
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/* 33 */ Option::None,
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/* 34 */ Option::None,
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/* 35 */ Option::None,
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/* 36 */ Option::None,
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/* 37 */ Option::None,
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/* 38 */ instr!(sec, imp, 2, 1),
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/* 39 */ Option::None,
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/* 3A */ Option::None,
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/* 3B */ Option::None,
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/* 3C */ Option::None,
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/* 3D */ Option::None,
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/* 3E */ Option::None,
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/* 3F */ Option::None,
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/* 40 */ instr!(rti, imp, 6, 1),
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/* 41 */ instr!(eor, idx, 6, 2),
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/* 42 */ Option::None,
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/* 43 */ Option::None,
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/* 44 */ Option::None,
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/* 45 */ Option::None,
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/* 46 */ Option::None,
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/* 47 */ Option::None,
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/* 48 */ instr!(pha, imp, 3, 1),
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/* 49 */ instr!(eor, imm, 2, 2),
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/* 4A*/ instr!(lsr, acc, 2, 1),
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/* 4B */ Option::None,
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/* 4C */ instr!(jmp, abs, 3, 3),
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/* 4D */ Option::None,
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/* 4E */ Option::None,
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/* 4F */ Option::None,
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/* 50 */ instr!(bvc, rel, 2, 2),
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/* 51 */ Option::None,
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/* 52 */ Option::None,
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/* 53 */ Option::None,
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/* 54 */ Option::None,
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/* 55 */ Option::None,
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/* 56 */ Option::None,
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/* 57 */ Option::None,
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/* 58 */ Option::None,
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/* 59 */ Option::None,
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/* 5A */ Option::None,
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/* 5B */ Option::None,
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/* 5C */ Option::None,
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/* 5D */ Option::None,
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/* 5E */ Option::None,
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/* 5F */ Option::None,
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/* 60 */ instr!(rts, imp, 6, 1),
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/* 61 */ instr!(adc, idx, 6, 2),
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/* 62 */ Option::None,
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/* 63 */ Option::None,
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/* 64 */ Option::None,
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/* 65 */ Option::None,
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/* 66 */ Option::None,
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/* 67 */ Option::None,
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/* 68 */ instr!(pla, imp, 4, 1),
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/* 69 */ instr!(adc, imm, 2, 2),
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/* 6A */ instr!(ror, acc, 2, 1),
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/* 6B */ Option::None,
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/* 6C */ Option::None,
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/* 6D */ Option::None,
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/* 6E */ Option::None,
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/* 6F */ Option::None,
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/* 70 */ instr!(bvs, rel, 2, 2),
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/* 71 */ Option::None,
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/* 72 */ Option::None,
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/* 73 */ Option::None,
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/* 74 */ Option::None,
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/* 75 */ Option::None,
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/* 76 */ Option::None,
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/* 77 */ Option::None,
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/* 78 */ instr!(sei, imp, 2, 1),
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/* 79 */ Option::None,
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/* 7A */ Option::None,
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/* 7B */ Option::None,
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/* 7C */ Option::None,
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/* 7D */ Option::None,
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/* 7E */ Option::None,
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/* 7F */ Option::None,
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/* 80 */ Option::None,
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/* 81 */ instr!(sta, idx, 6, 2),
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/* 82 */ Option::None,
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/* 83 */ Option::None,
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/* 84 */ instr!(sty, zpg, 3, 2),
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/* 85 */ instr!(sta, zpg, 3, 2),
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/* 86 */ instr!(stx, zpg, 3, 2),
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/* 87 */ Option::None,
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/* 88 */ instr!(dey, imp, 2, 1),
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/* 89 */ Option::None,
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/* 8A */ instr!(txa, imp, 2, 1),
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/* 8B */ Option::None,
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/* 8C */ Option::None,
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/* 8D */ instr!(sta, abs, 4, 3),
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/* 8E */ instr!(stx, abs, 4, 3),
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/* 8F */ Option::None,
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/* 90 */ instr!(bcc, rel, 2, 2),
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/* 91 */ Option::None,
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/* 92 */ Option::None,
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/* 93 */ Option::None,
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/* 94 */ Option::None,
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/* 95 */ Option::None,
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/* 96 */ Option::None,
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/* 97 */ Option::None,
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/* 98 */ instr!(tya, imp, 2, 1),
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/* 99 */ Option::None,
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/* 9A */ instr!(txs, imp, 2, 1),
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/* 9B */ Option::None,
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/* 9C */ Option::None,
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/* 9D */ Option::None,
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/* 9E */ Option::None,
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/* 9F */ Option::None,
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/* A0 */ instr!(ldy, imm, 2, 2),
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/* A1 */ instr!(lda, idx, 6, 2),
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/* A2 */ instr!(ldx, imm, 2, 2),
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/* A3 */ Option::None,
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/* A4 */ instr!(ldy, zpg, 3, 2),
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/* A5 */ instr!(lda, zpg, 3, 2),
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/* A6 */ instr!(ldx, zpg, 3, 2),
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/* A7 */ Option::None,
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/* A8 */ instr!(tay, imp, 2, 1),
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/* A9 */ instr!(lda, imm, 2, 2),
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/* AA */ instr!(tax, imp, 2, 1),
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/* AB */ Option::None,
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/* AC */ Option::None,
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/* AD */ instr!(lda, abs, 4, 3),
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/* AE */ instr!(ldx, abs, 4, 3),
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/* AF */ Option::None,
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/* B0 */ instr!(bcs, rel, 2, 2),
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/* B1 */ Option::None,
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/* B2 */ Option::None,
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/* B3 */ Option::None,
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/* B4 */ Option::None,
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/* B5 */ Option::None,
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/* B6 */ Option::None,
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/* B7 */ Option::None,
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/* B8 */ instr!(clv, imp, 2, 1),
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/* B9 */ Option::None,
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/* BA */ instr!(tsx, imp, 2, 1),
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/* BB */ Option::None,
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/* BC */ Option::None,
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/* BD */ Option::None,
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/* BE */ Option::None,
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/* BF */ Option::None,
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/* C0 */ instr!(cpy, imm, 2, 2),
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/* C1 */ instr!(cmp, idx, 6, 2),
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/* C2 */ Option::None,
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/* C3 */ Option::None,
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/* C4 */ Option::None,
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/* C5 */ Option::None,
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/* C6 */ Option::None,
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/* C7 */ Option::None,
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/* C8 */ instr!(iny, imp, 2, 1),
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/* C9 */ instr!(cmp, imm, 2, 2),
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/* CA */ instr!(dex, imp, 2, 1),
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/* CB */ Option::None,
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/* CC */ Option::None,
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/* CD */ Option::None,
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/* CE */ Option::None,
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/* CF */ Option::None,
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/* D0 */ instr!(bne, rel, 2, 2),
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/* D1 */ Option::None,
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/* D2 */ Option::None,
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/* D3 */ Option::None,
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/* D4 */ Option::None,
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/* D5 */ Option::None,
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/* D6 */ Option::None,
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/* D7 */ Option::None,
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/* D8 */ instr!(cld, imp, 2, 1),
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/* D9 */ Option::None,
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/* DA */ Option::None,
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/* DB */ Option::None,
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/* DC */ Option::None,
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/* DD */ Option::None,
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/* DE */ Option::None,
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/* DF */ Option::None,
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/* E0 */ instr!(cpx, imm, 2, 2),
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/* E1 */ instr!(sbc, idx, 6, 2),
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/* E2 */ Option::None,
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/* E3 */ Option::None,
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/* E4 */ Option::None,
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/* E5 */ Option::None,
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/* E6 */ Option::None,
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/* E7 */ Option::None,
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/* E8 */ instr!(inx, imp, 2, 1),
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/* E9 */ instr!(sbc, imm, 2, 2),
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/* EA */ instr!(nop, imp, 2, 1),
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/* EB */ Option::None,
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/* EC */ Option::None,
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/* ED */ Option::None,
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/* EE */ Option::None,
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/* EF */ Option::None,
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/* F0 */ instr!(beq, rel, 2, 2),
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/* F1 */ Option::None,
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/* F2 */ Option::None,
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/* F3 */ Option::None,
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/* F4 */ Option::None,
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/* F5 */ Option::None,
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/* F6 */ Option::None,
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/* F7 */ Option::None,
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/* F8 */ instr!(sed, imp, 2, 1),
|
||||
/* F9 */ Option::None,
|
||||
/* FA */ Option::None,
|
||||
/* FB */ Option::None,
|
||||
/* FC */ Option::None,
|
||||
/* FD */ Option::None,
|
||||
/* FE */ Option::None,
|
||||
/* FF */ Option::None
|
||||
];
|
||||
|
|
@ -325,7 +325,6 @@ impl CPU
|
|||
bitshift_fn!(rol, <<, true);
|
||||
bitshift_fn!(ror, >>, true);
|
||||
|
||||
|
||||
pub fn adc(&mut self)
|
||||
{
|
||||
let value = self.fetch() as u16;
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@ mod cpu;
|
|||
mod instructions;
|
||||
mod addressing;
|
||||
mod cartridge;
|
||||
mod mnemonic;
|
||||
|
||||
use nes::NES;
|
||||
|
||||
|
|
|
|||
35
src/mnemonic.rs
Normal file
35
src/mnemonic.rs
Normal file
|
|
@ -0,0 +1,35 @@
|
|||
use std::fmt;
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
pub struct Mnemonic {
|
||||
buf: [char; 4]
|
||||
}
|
||||
|
||||
impl Mnemonic
|
||||
{
|
||||
pub const fn new(content: &str, illegal: bool) -> Mnemonic
|
||||
{
|
||||
let mut buf: [char; 4] = [' '; 4];
|
||||
if illegal {
|
||||
buf[0] = '*';
|
||||
} else {
|
||||
buf[0] = ' ';
|
||||
}
|
||||
|
||||
buf[1] = content.as_bytes()[0] as char;
|
||||
buf[2] = content.as_bytes()[1] as char;
|
||||
buf[3] = content.as_bytes()[2] as char;
|
||||
|
||||
Mnemonic {
|
||||
buf: buf
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl fmt::Display for Mnemonic
|
||||
{
|
||||
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result
|
||||
{
|
||||
write!(f, "{}{}{}{}", self.buf[0], self.buf[1], self.buf[2], self.buf[3])
|
||||
}
|
||||
}
|
||||
Loading…
Reference in a new issue