add more instructions
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parent
48b76193d2
commit
b8d5b8f029
14
src/cpu.rs
14
src/cpu.rs
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@ -60,22 +60,31 @@ impl CPU
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const UNDEF_INSTR: Option<Instruction> = None;
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let mut instr_set = [UNDEF_INSTR; 256];
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instr_set[0x08] = instr!(php, imp, 3, 1);
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instr_set[0x09] = instr!(ora, imm, 2, 2);
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instr_set[0x10] = instr!(bpl, rel, 2, 2);
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instr_set[0x18] = instr!(clc, imp, 2, 1);
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instr_set[0x20] = instr!(jsr, abs, 6, 3);
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instr_set[0x24] = instr!(bit, zpg, 3, 2);
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instr_set[0x28] = instr!(plp, imp, 4, 1);
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instr_set[0x29] = instr!(and, imm, 2, 2);
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instr_set[0x30] = instr!(bmi, rel, 2, 2);
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instr_set[0x38] = instr!(sec, imp, 2, 1);
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instr_set[0x48] = instr!(pha, imp, 3, 1);
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instr_set[0x49] = instr!(eor, imm, 2, 2);
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instr_set[0x4C] = instr!(jmp, abs, 3, 3);
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instr_set[0x50] = instr!(bvc, rel, 2, 2);
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instr_set[0x60] = instr!(rts, imp, 6, 1);
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instr_set[0x68] = instr!(pla, imp, 4, 1);
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instr_set[0x70] = instr!(bvs, rel, 2, 2);
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instr_set[0x78] = instr!(sei, imp, 2, 1);
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instr_set[0x85] = instr!(sta, zpg, 3, 2);
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instr_set[0x86] = instr!(stx, zpg, 3, 2);
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@ -86,12 +95,17 @@ impl CPU
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instr_set[0xA9] = instr!(lda, imm, 2, 2);
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instr_set[0xB0] = instr!(bcs, rel, 2, 2);
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instr_set[0xB8] = instr!(clv, imp, 2, 1);
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instr_set[0xC9] = instr!(cmp, imm, 2, 2);
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instr_set[0xD0] = instr!(bne, rel, 2, 2);
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instr_set[0xD8] = instr!(cld, imp, 2, 1);
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instr_set[0xEA] = instr!(nop, imp, 2, 1);
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instr_set[0xF0] = instr!(beq, rel, 2, 2);
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instr_set[0xF8] = instr!(sed, imp, 2, 1);
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CPU {
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cycle: 0,
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@ -7,6 +7,7 @@ enum Bit
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{
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Negative = 7,
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Overflow = 6,
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Break = 4,
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Decimal = 3,
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Interrupt = 2,
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Zero = 1,
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@ -131,6 +132,22 @@ macro_rules! store_fn
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};
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}
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macro_rules! cmp_fn
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{
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($name: ident, $register: ident) =>
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{
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pub fn $name(&mut self)
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{
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let value = self.fetch();
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let result = self.$register.wrapping_sub(value);
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set_flag_to!(self.p, Bit::Zero, self.$register == value);
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set_flag_to!(self.p, Bit::Carry, self.$register >= value);
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set_flag_to!(self.p, Bit::Negative, (value >> 7) != 0);
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}
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}
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}
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impl CPU
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{
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fn fetch(&mut self) -> u8
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@ -150,6 +167,11 @@ impl CPU
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set_flag_fn!(clc, Bit::Carry, false);
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set_flag_fn!(sec, Bit::Carry, true);
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set_flag_fn!(sei, Bit::Interrupt, true);
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set_flag_fn!(cli, Bit::Interrupt, false);
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set_flag_fn!(sed, Bit::Decimal, true);
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set_flag_fn!(cld, Bit::Decimal, false);
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set_flag_fn!(clv, Bit::Overflow, false);
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load_fn!(lda, acc);
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load_fn!(ldx, x);
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@ -159,6 +181,19 @@ impl CPU
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store_fn!(stx, x);
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store_fn!(sty, y);
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cmp_fn!(cmp, acc);
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cmp_fn!(cpx, x);
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cmp_fn!(cpy, y);
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pub fn and(&mut self)
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{
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let val = self.fetch();
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self.acc &= val;
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set_flag_to!(self.p, Bit::Negative, (self.acc & (1u8 << 7)) > 0);
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set_flag_to!(self.p, Bit::Zero, self.acc == 0);
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}
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pub fn bit(&mut self)
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{
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let bus = self.bus.upgrade().unwrap();
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@ -169,6 +204,15 @@ impl CPU
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set_flag_to!(self.p, Bit::Zero, (self.acc & value) == 0);
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}
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pub fn eor(&mut self)
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{
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let val = self.fetch();
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self.acc ^= val;
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set_flag_to!(self.p, Bit::Negative, (self.acc & (1u8 << 7)) > 0);
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set_flag_to!(self.p, Bit::Zero, self.acc == 0);
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}
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pub fn jmp(&mut self)
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{
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self.pc = self.absolute_addr;
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@ -190,6 +234,54 @@ impl CPU
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}
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pub fn ora(&mut self)
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{
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let val = self.fetch();
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self.acc |= val;
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set_flag_to!(self.p, Bit::Negative, (self.acc & (1u8 << 7)) > 0);
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set_flag_to!(self.p, Bit::Zero, self.acc == 0);
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}
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pub fn pha(&mut self)
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{
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let bus = self.bus.upgrade().unwrap();
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push!(bus.borrow_mut(), self.sp, self.acc);
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}
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pub fn pla(&mut self)
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{
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let bus = self.bus.upgrade().unwrap();
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self.acc = pop(bus.borrow(), &mut self.sp);
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set_flag_to!(self.p, Bit::Negative, (self.acc & (1u8 << 7)) > 0);
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set_flag_to!(self.p, Bit::Zero, self.acc == 0);
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}
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pub fn php(&mut self)
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{
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let bus = self.bus.upgrade().unwrap();
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let mut value = self.p;
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set_flag!(value, Bit::Break);
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set_flag!(value, 5);
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push!(bus.borrow_mut(), self.sp, value);
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}
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pub fn plp(&mut self)
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{
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let bus = self.bus.upgrade().unwrap();
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let flag: u8 = pop(bus.borrow(), &mut self.sp);
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let mask: u8 = 0b1100111;
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self.p &= !mask;
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self.p |= flag & mask;
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}
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pub fn rts(&mut self)
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{
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let bus = self.bus.upgrade().unwrap();
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