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add ppu memory area to bus

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Lauchmelder 2022-08-31 20:00:00 +02:00
parent ee635f6532
commit 5eb4d73dc2
2 changed files with 19 additions and 1 deletions
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4
src/nes/bus.rs
View file

@ -42,6 +42,7 @@ impl Bus
match addr match addr
{ {
0..=0x1FFF => self.ram[(addr & 0x7FF) as usize], 0..=0x1FFF => self.ram[(addr & 0x7FF) as usize],
0x2000..=0x3FFF => self.ppu.upgrade().unwrap().borrow_mut().get_regsiter(addr & 0x7),
0x8000..=0xFFFF => self.cartridge.read_prg(addr & 0x7FFF), 0x8000..=0xFFFF => self.cartridge.read_prg(addr & 0x7FFF),
_ => panic!("Tried to access invalid memory address ${:04X}", addr) _ => panic!("Tried to access invalid memory address ${:04X}", addr)
@ -53,9 +54,10 @@ impl Bus
match addr match addr
{ {
0..=0x1FFF => self.ram[(addr & 0x7FF) as usize] = val, 0..=0x1FFF => self.ram[(addr & 0x7FF) as usize] = val,
0x2000..=0x3FFF => self.ppu.upgrade().unwrap().borrow_mut().set_regsiter(addr & 0x7, val),
0x8000..=0xFFFF => self.cartridge.write_prg(addr & 0x7FFF, val), 0x8000..=0xFFFF => self.cartridge.write_prg(addr & 0x7FFF, val),
_ => panic!("Tried to access invalid memory address ${:04X}", addr) _ => { }
} }
} }
} }

16
src/nes/ppu.rs
View file

@ -24,6 +24,22 @@ impl PPU
} }
} }
pub fn set_regsiter(&mut self, addr: u16, val: u8)
{
match addr
{
_ => panic!("Register not implemented")
}
}
pub fn get_regsiter(&mut self, addr: u16) -> u8
{
match addr
{
_ => panic!("Register not implemented")
}
}
pub fn dot(&mut self) pub fn dot(&mut self)
{ {
self.screen_x += 1; self.screen_x += 1;