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added mem 16

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This commit is contained in:
Tristan Krause 2019-06-21 16:32:04 +02:00
parent fbf95edb58
commit a76321eb6b
6 changed files with 153 additions and 32 deletions
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38
firmware/request_handlers.cpp
View file

@ -71,12 +71,12 @@ void handleRequest()
rqPwmSetValue();
break;
case RQ_SET_REGISTER:
rqSetRegister();
case RQ_SET_MEM_8:
rqSetMem8();
break;
case RQ_GET_REGISTER:
rqGetRegister();
case RQ_GET_MEM_8:
rqGetMem8();
break;
default:
@ -253,23 +253,43 @@ void rqPwmSetValue()
usart.flush();
}
void rqSetRegister()
void rqSetMem8()
{
usart.initTX();
uint16_t reg = usart.readByte();
uint16_t val = usart.readByte();
uint16_t reg = usart.readInt();
uint8_t val = usart.readByte();
(*(volatile uint8_t *) reg) = val;
usart.writeByte((*(volatile uint8_t *) reg));
usart.flush();
}
void rqGetRegister()
void rqGetMem8()
{
usart.initTX();
uint16_t reg = usart.readByte();
uint16_t reg = usart.readInt();
usart.writeByte((*(volatile uint8_t *) reg));
usart.flush();
}
void rqSetMem16()
{
usart.initTX();
uint16_t reg = usart.readInt();
uint16_t val = usart.readInt();
(*(volatile uint16_t *) reg) = val;
usart.writeInt((*(volatile uint16_t *) reg));
usart.flush();
}
void rqGetMem16()
{
usart.initTX();
uint16_t reg = usart.readInt();
usart.writeInt((*(volatile uint16_t *) reg));
usart.flush();
}

6
firmware/request_handlers.h
View file

@ -2,7 +2,7 @@
#define REQUEST_HANDLERS_H
#include <avr/wdt.h>
#include "requests.h"
#include "../control/src/drv/requests.h"
#include "global_vars.h"
#include "selftest.h"
#include "boardinfo.h"
@ -30,7 +30,7 @@ void rqAnalogRead(void);
void rqAdcDacStroke(void);
void rqPwmSetFreq(void);
void rqPwmSetValue(void);
void rqSetRegister(void);
void rqGetRegister(void);
void rqSetMem8(void);
void rqGetMem8(void);
#endif // REQUEST_HANDLERS_H

44
firmware/requests.h
View file

@ -1,44 +0,0 @@
#ifndef REQUESTS_H
#define REQUESTS_H
constexpr static uint8_t RQ_DISCARD = 0;
constexpr static uint8_t RQ_TEST = 1;
constexpr static uint8_t RQ_INFO = 2;
constexpr static uint8_t RQ_INT_TEST = 3;
constexpr static uint8_t RQ_SELF_TEST = 4;
constexpr static uint8_t RQ_DIGITAL_WRITE_0 = 5;
constexpr static uint8_t RQ_DIGITAL_WRITE_1 = 6;
constexpr static uint8_t RQ_DIGITAL_READ_0 = 7;
constexpr static uint8_t RQ_DIGITAL_READ_1 = 8;
constexpr static uint8_t RQ_READ_DIP_SWITCH = 9;
constexpr static uint8_t RQ_ANALOG_WRITE_0 = 10;
constexpr static uint8_t RQ_ANALOG_WRITE_1 = 11;
constexpr static uint8_t RQ_ANALOG_READ = 12;
constexpr static uint8_t RQ_ADC_DAC_STROKE = 13;
constexpr static uint8_t RQ_PWM_SET_FREQ = 14;
constexpr static uint8_t RQ_PWM_SET_VALUE = 15;
constexpr static uint8_t RQ_SET_REGISTER = 16;
constexpr static uint8_t RQ_GET_REGISTER = 17;
uint8_t const rq_len[] = {
1 /* RQ_DISCARD */,
1 /* RQ_TEST */ + 1 /* test byte */,
1 /* RQ_INFO */,
1 /* RQ_INT_TEST */ + 1 /* test int high low */ + 1 /* test int high high */,
1 /* RQ_SELF_TEST */,
1 /* RQ_DIGITAL_WRITE_0 */ + 1 /* port value */,
1 /* RQ_DIGITAL_WRITE_1 */ + 1 /* port value */,
1 /* RQ_DIGITAL_READ_0 */,
1 /* RQ_DIGITAL_READ_1 */,
1 /* RQ_READ_DIP_SWITCH */,
1 /* RQ_ANALOG_WRITE_0 */ + 1 /* test int high low */ + 1 /* test int high high */,
1 /* RQ_ANALOG_WRITE_1 */ + 1 /* test int high low */ + 1 /* test int high high */,
1 /* RQ_ANALOG_READ */ + 1 /* adc channel */,
1 /* RQ_ADC_DAC_STROKE */ + 1 /* channel a */ + 1 /* channel b */ + 1 /* start low */ + 1 /* start high */ + 1 /* delta low */ + 1 /* delta high */ + 1 /* count low */ + 1 /* count high */,
1 /* RQ_PWM_SET_FREQ */ + 1 /* freq low low */ + 1 /* freq low high */ + 1 /* freq high low */ + 1 /* freq high high */,
1 /* RQ_PWM_SET_VALUE */ + 1 /* pwm value */,
1 /* RQ_SET_REGISTER */ + 1 /* register address*/ + 1 /* register value */,
1 /* RQ_GET_REGISTER */ + 1 /* register address*/,
};
#endif // REQUESTS_H