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aadded all instructions to run test rom

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Lauchmelder 2021-10-23 18:52:09 +02:00
parent 2596ac2c65
commit 1af2c37b70
3 changed files with 106 additions and 4 deletions
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102
NES Emulator/cpu.c
View file

@ -388,6 +388,19 @@ void execute(struct CPU* cpu)
cpu->status.carry = (cpu->fetchedVal <= cpu->y); cpu->status.carry = (cpu->fetchedVal <= cpu->y);
} break; } break;
case DCP:
{
cpu->fetchedVal--;
writeBus(cpu->bus, cpu->fetchedAddress, cpu->fetchedVal);
Byte result = cpu->acc - cpu->fetchedVal;
cpu->status.negative = (result >> 7);
cpu->status.zero = (result == 0x00);
cpu->status.carry = (cpu->fetchedVal <= cpu->acc);
cpu->remainingCycles = cpu->currentOpcode->cycles;
} break;
case DEC: case DEC:
{ {
cpu->fetchedVal--; cpu->fetchedVal--;
@ -448,6 +461,22 @@ void execute(struct CPU* cpu)
cpu->status.zero = (cpu->y == 0x00); cpu->status.zero = (cpu->y == 0x00);
} break; } break;
case ISC:
{
cpu->fetchedVal++;
writeBus(cpu->bus, cpu->fetchedAddress, cpu->fetchedVal);
Word result = cpu->acc + ~cpu->fetchedVal + cpu->status.carry;
cpu->status.carry = ((result & 0x8000) != 0x8000);
cpu->status.overflow = ((~(cpu->acc ^ ~cpu->fetchedVal) & (cpu->acc ^ result) & 0x80) == 0x80);
cpu->status.negative = ((result & 0x80) == 0x80);
cpu->status.zero = ((result & 0xFF) == 0x00);
cpu->acc = result & 0xFF;
cpu->remainingCycles = cpu->currentOpcode->cycles;
} break;
case JMP: case JMP:
{ {
cpu->pc.word = cpu->fetchedAddress; cpu->pc.word = cpu->fetchedAddress;
@ -547,6 +576,23 @@ void execute(struct CPU* cpu)
cpu->status.raw = Pop(cpu->bus) | 0b00110000; cpu->status.raw = Pop(cpu->bus) | 0b00110000;
} break; } break;
case RLA:
{
Byte oldCarry = cpu->status.carry;
cpu->status.carry = ((cpu->fetchedVal & 0x80) == 0x80);
cpu->fetchedVal <<= 1;
cpu->fetchedVal |= oldCarry;
writeBus(cpu->bus, cpu->fetchedAddress, cpu->fetchedVal);
cpu->acc &= cpu->fetchedVal;
cpu->status.negative = ((cpu->acc & 0x80) == 0x80);
cpu->status.zero = (cpu->acc == 0x00);
cpu->remainingCycles = cpu->currentOpcode->cycles;
} break;
case ROL: case ROL:
{ {
Byte oldCarry = cpu->status.carry; Byte oldCarry = cpu->status.carry;
@ -581,6 +627,27 @@ void execute(struct CPU* cpu)
cpu->acc = cpu->fetchedVal; cpu->acc = cpu->fetchedVal;
} break; } break;
case RRA:
{
Byte oldCarry = cpu->status.carry;
cpu->status.carry = ((cpu->fetchedVal & 0x01) == 0x01);
cpu->fetchedVal >>= 1;
cpu->fetchedVal |= (oldCarry << 7);
writeBus(cpu->bus, cpu->fetchedAddress, cpu->fetchedVal);
Word result = cpu->acc + cpu->fetchedVal + cpu->status.carry;
cpu->status.carry = (result > 0xFF);
cpu->status.overflow = ((~(cpu->acc ^ cpu->fetchedVal) & (cpu->acc ^ result) & 0x80) == 0x80);
cpu->status.negative = (result >> 7);
cpu->status.zero = ((result & 0xFF) == 0x00);
cpu->acc = result & 0xFF;
cpu->remainingCycles = cpu->currentOpcode->cycles;
} break;
case RTI: case RTI:
{ {
cpu->status.raw = Pop(cpu->bus) | 0b00110000; cpu->status.raw = Pop(cpu->bus) | 0b00110000;
@ -596,6 +663,11 @@ void execute(struct CPU* cpu)
cpu->pc.word++; cpu->pc.word++;
} break; } break;
case SAX:
{
writeBus(cpu->bus, cpu->fetchedAddress, cpu->acc & cpu->x);
} break;
case SBC: case SBC:
{ {
Word result = cpu->acc + ~cpu->fetchedVal + cpu->status.carry; Word result = cpu->acc + ~cpu->fetchedVal + cpu->status.carry;
@ -623,6 +695,36 @@ void execute(struct CPU* cpu)
cpu->status.id = 1; cpu->status.id = 1;
} break; } break;
case SLO:
{
cpu->status.carry = ((cpu->fetchedVal & 0x80) == 0x80);
cpu->fetchedVal <<= 1;
writeBus(cpu->bus, cpu->fetchedAddress, cpu->fetchedVal);
cpu->acc |= cpu->fetchedVal;
cpu->status.negative = ((cpu->acc & 0x80) == 0x80);
cpu->status.zero = (cpu->acc == 0x00);
cpu->remainingCycles = cpu->currentOpcode->cycles;
} break;
case SRE:
{
cpu->status.carry = ((cpu->fetchedVal & 0x01) == 0x01);
cpu->fetchedVal >>= 1;
writeBus(cpu->bus, cpu->fetchedAddress, cpu->fetchedVal);
cpu->acc ^= cpu->fetchedVal;
cpu->status.negative = ((cpu->acc & 0x80) == 0x80);
cpu->status.zero = (cpu->acc == 0x00);
cpu->remainingCycles = cpu->currentOpcode->cycles;
} break;
case STA: case STA:
{ {
writeBus(cpu->bus, cpu->fetchedAddress, cpu->acc); writeBus(cpu->bus, cpu->fetchedAddress, cpu->acc);

6
NES Emulator/cpu.h
View file

@ -16,9 +16,9 @@ enum Operation
ROR, RTI, RTS, SBC, SEC, SED, SEI, STA, ROR, RTI, RTS, SBC, SEC, SED, SEI, STA,
STX, STY, TAX, TAY, TSX, TXA, TXS, TYA, STX, STY, TAX, TAY, TSX, TXA, TXS, TYA,
ANC, ASR, ARR, DCP, ISC, ISX, JAM, LAS, ANC, ASR, ARR, DCP, ISC, JAM, LAS, LAX,
LAX, RLA, RRA, SAX, SBX, SLO, SHA, SHS, RLA, RRA, SAX, SBX, SLO, SHA, SHS, SHX,
SHX, SHY, SRE, XAA SHY, SRE, XAA
}; };
enum AddrMode enum AddrMode

2
NES Emulator/opcodes.c
View file

@ -245,7 +245,7 @@ const struct Opcode OPCODE_TABLE[256] =
/* E0 */ NEW_OPCODE(CPX, IMM, 2, 2, 0), /* E0 */ NEW_OPCODE(CPX, IMM, 2, 2, 0),
/* E1 */ NEW_OPCODE(SBC, INDX, 6, 2, 0), /* E1 */ NEW_OPCODE(SBC, INDX, 6, 2, 0),
/* E2 */ NEW_OPCODE(NOP, IMM, 2, 2, 1), /* E2 */ NEW_OPCODE(NOP, IMM, 2, 2, 1),
/* E3 */ NEW_OPCODE(ISX, INDX, 8, 2, 1), /* E3 */ NEW_OPCODE(ISC, INDX, 8, 2, 1),
/* E4 */ NEW_OPCODE(CPX, ZPG, 3, 2, 0), /* E4 */ NEW_OPCODE(CPX, ZPG, 3, 2, 0),
/* E5 */ NEW_OPCODE(SBC, ZPG, 3, 2, 0), /* E5 */ NEW_OPCODE(SBC, ZPG, 3, 2, 0),
/* E6 */ NEW_OPCODE(INC, ZPG, 5, 2, 0), /* E6 */ NEW_OPCODE(INC, ZPG, 5, 2, 0),