diff --git a/NES Emulator/cpu.c b/NES Emulator/cpu.c
index a067c5c..e6ca66c 100644
--- a/NES Emulator/cpu.c	
+++ b/NES Emulator/cpu.c	
@@ -48,15 +48,132 @@ void fetch(struct CPU* cpu)
 	Byte opcodeVal = readBus(cpu->bus, cpu->pc);
 	cpu->currentOpcode = OPCODE_TABLE + opcodeVal;
 
-	if (cpu->currentOpcode->op == Unknown)
+	if (cpu->currentOpcode->op == XXX)
 	{
 		fprintf(stderr, "Unknown opcode: %x", opcodeVal);
 		exit(1);
 	}
 
+	cpu->remainingCycles = cpu->currentOpcode->cycles;
 
+	switch (cpu->currentOpcode->addr)
+	{
+	case ACC:
+		cpu->fetchedVal = cpu->acc;
+		break;
+
+	case ABS:
+	{
+		Byte lo = readBus(cpu->bus, cpu->pc++);
+		Byte hi = readBus(cpu->bus, cpu->pc++);
+		cpu->fetchedAddress = ((Word)hi << 8) | lo;
+	} break;
+
+	case ABX:
+	{
+		Byte lo = readBus(cpu->bus, cpu->pc++);
+		Byte hi = readBus(cpu->bus, cpu->pc++);
+		Word addr = ((Word)hi << 8) | lo;
+
+		cpu->fetchedAddress = addr + cpu->x;
+		
+		if ((cpu->fetchedAddress & 0xFF00) != (addr & 0xFF00))
+			cpu->remainingCycles++;
+
+	} break;
+
+	case ABY:
+	{
+		Byte lo = readBus(cpu->bus, cpu->pc++);
+		Byte hi = readBus(cpu->bus, cpu->pc++);
+		Word addr = ((Word)hi << 8) | lo;
+
+		cpu->fetchedAddress = addr + cpu->y;
+
+		if ((cpu->fetchedAddress & 0xFF00) != (addr & 0xFF00))
+			cpu->remainingCycles++;
+
+	} break;
+	
+	case IMM:
+		cpu->fetchedVal = readBus(cpu->bus, cpu->pc++);
+		break;
+
+	case IMP:
+		break;
+
+	case IND:
+	{
+		Byte lo = readBus(cpu->bus, cpu->pc++);
+		Byte hi = readBus(cpu->bus, cpu->pc++);
+		Word addr = ((Word)hi << 8) | lo;
+
+		cpu->fetchedAddress = readBus(cpu->bus, addr);
+
+	} break;
+
+	case INDX:
+	{
+		Byte op = readBus(cpu->bus, cpu->pc++);
+		Byte lo = readBus(cpu->bus, op + cpu->x);
+		Byte hi = readBus(cpu->bus, op + cpu->x + 1);
+		Word addr = ((Word)hi << 8) | lo;
+
+		cpu->fetchedAddress = readBus(cpu->bus, addr);
+
+	} break;
+
+	case INDY:
+	{
+		Byte op = readBus(cpu->bus, cpu->pc++);
+		Byte lo = readBus(cpu->bus, op);
+		Byte hi = readBus(cpu->bus, op + 1);
+		Word addr = ((Word)hi << 8) | lo;
+		addr = readBus(cpu->bus, addr);
+
+		cpu->fetchedAddress = addr + cpu->y;
+
+		if ((cpu->fetchedAddress & 0xFF00) != (addr & 0xFF00))
+			cpu->remainingCycles++;
+
+	} break;
+
+	case REL:
+	{
+		cpu->fetchedRelAddress = readBus(cpu->bus, cpu->pc++);
+	} break;
+
+	case ZPG:
+		cpu->fetchedAddress = readBus(cpu->bus, cpu->pc++);
+		break;
+
+	case ZPX:
+	{
+		cpu->fetchedAddress = readBus(cpu->bus, cpu->pc++) + cpu->x;
+		cpu->fetchedAddress |= 0xFF;
+	} break;
+
+	case ZPY:
+	{
+		cpu->fetchedAddress = readBus(cpu->bus, cpu->pc++) + cpu->y;
+		cpu->fetchedAddress |= 0xFF;
+	} break;
+
+	}
 }
 
 void execute(struct CPU* cpu)
 {
+	switch (cpu->currentOpcode->op)
+	{
+	case JMP:
+	{
+		cpu->pc = cpu->fetchedAddress;
+	} break;
+
+	default:
+		fprintf(stderr, "Unknown instruction: %s", cpu->currentOpcode->str);
+		exit(1);
+		break;
+	}
 }
diff --git a/NES Emulator/cpu.h b/NES Emulator/cpu.h
index b534e44..bf2bb31 100644
--- a/NES Emulator/cpu.h	
+++ b/NES Emulator/cpu.h	
@@ -5,7 +5,7 @@
 
 struct Bus;
 
-typedef enum
+enum Operation
 {
 	XXX = 0,
 	ADC, AND, ASL, BCC, BCS, BEQ, BIT, BMI,
@@ -15,23 +15,23 @@ typedef enum
 	LSR, NOP, ORA, PHA, PHP, PLA, PLP, ROL,
 	ROR, RTI, RTS, SBC, SEC, SED, SEI, STA,
 	STX, STY, TAX, TAY, TSX, TXA, TXS, TYA
-} Operation;
+};
 
-typedef enum 
+enum AddrMode
 {
-	ACC, ABS, ABX, ABY, IMM, IMP, IND, XIN, INY, REL, ZPG, ZPX, ZPY
-} AddrMode;
+	ACC, ABS, ABX, ABY, IMM, IMP, IND, INDX, INDY, REL, ZPG, ZPX, ZPY
+};
 
 struct Opcode
 {
-	Operation op;
-	AddrMode addr;
+	enum Operation op;
+	enum AddrMode addr;
 	Byte cycles;
 
 	const char str[4];
 };
 
-const struct Opcode OPCODE_MATRIX[512];
+const struct Opcode OPCODE_TABLE[256];
 
 
 struct CPU
@@ -59,8 +59,11 @@ struct CPU
 	Word pc;
 
 	Byte remainingCycles;
+
 	Byte fetchedVal;
 	Word fetchedAddress;
+	char fetchedRelAddress;
+
 	const struct Opcode* currentOpcode;
 
 	struct Bus* bus;
diff --git a/NES Emulator/opcodes.c b/NES Emulator/opcodes.c
index 31b8d46..ec03b10 100644
--- a/NES Emulator/opcodes.c	
+++ b/NES Emulator/opcodes.c	
@@ -5,7 +5,7 @@
 const struct Opcode OPCODE_TABLE[256] =
 {
 	/* 00 */	NEW_OPCODE(BRK, IMP, 7),
-	/* 01 */	NEW_OPCODE(ORA, XIN, 6),
+	/* 01 */	NEW_OPCODE(ORA, INDX, 6),
 	/* 02 */	NEW_OPCODE(XXX, IMP, 0),
 	/* 03 */	NEW_OPCODE(XXX, IMP, 0),
 	/* 04 */	NEW_OPCODE(XXX, IMP, 0),
@@ -22,7 +22,7 @@ const struct Opcode OPCODE_TABLE[256] =
 	/* 0F */	NEW_OPCODE(XXX, IMP, 0),
 
 	/* 10 */	NEW_OPCODE(BPL, REL, 2),
-	/* 11 */	NEW_OPCODE(ORA, INY, 5),
+	/* 11 */	NEW_OPCODE(ORA, INDY, 5),
 	/* 12 */	NEW_OPCODE(XXX, IMP, 0),
 	/* 13 */	NEW_OPCODE(XXX, IMP, 0),
 	/* 14 */	NEW_OPCODE(XXX, IMP, 0),
@@ -38,105 +38,241 @@ const struct Opcode OPCODE_TABLE[256] =
 	/* 1E */	NEW_OPCODE(ASL, ABX, 7),
 	/* 1F */	NEW_OPCODE(XXX, IMP, 0),
 
-	///* 20 */	NEW_OPCODE(JSR, ABS),
-	///* 21 */	NEW_OPCODE(AND, XIN),
-	///* 22 */	NEW_OPCODE(XXX, IMP),
-	///* 23 */	NEW_OPCODE(XXX, IMP),
-	///* 24 */	NEW_OPCODE(BIT, ZPG),
-	///* 25 */	NEW_OPCODE(AND, ZPG),
-	///* 26 */	NEW_OPCODE(ROL, ZPG),
-	///* 27 */	NEW_OPCODE(XXX, IMP),
-	///* 28 */	NEW_OPCODE(PLP, IMP),
-	///* 29 */	NEW_OPCODE(AND, IMM),
-	///* 2A */	NEW_OPCODE(ROL, ACC),
-	///* 2B */	NEW_OPCODE(XXX, IMP),
-	///* 2C */	NEW_OPCODE(BIT, ABS),
-	///* 2D */	NEW_OPCODE(AND, ABS),
-	///* 2E */	NEW_OPCODE(ROL, ABS),
-	///* 2F */	NEW_OPCODE(XXX, IMP),
+	/* 20 */	NEW_OPCODE(JSR, ABS, 6),
+	/* 21 */	NEW_OPCODE(AND, INDX, 6),
+	/* 22 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 23 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 24 */	NEW_OPCODE(BIT, ZPG, 3),
+	/* 25 */	NEW_OPCODE(AND, ZPG, 3),
+	/* 26 */	NEW_OPCODE(ROL, ZPG, 5),
+	/* 27 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 28 */	NEW_OPCODE(PLP, IMP, 4),
+	/* 29 */	NEW_OPCODE(AND, IMM, 2),
+	/* 2A */	NEW_OPCODE(ROL, ACC, 2),
+	/* 2B */	NEW_OPCODE(XXX, IMP, 0),
+	/* 2C */	NEW_OPCODE(BIT, ABS, 4),
+	/* 2D */	NEW_OPCODE(AND, ABS, 4),
+	/* 2E */	NEW_OPCODE(ROL, ABS, 6),
+	/* 2F */	NEW_OPCODE(XXX, IMP, 0),
 
-	///* 30 */	NEW_OPCODE(BMI, REL),
-	///* 31 */	NEW_OPCODE(AND, INY),
-	///* 32 */	NEW_OPCODE(XXX, IMP),
-	///* 33 */	NEW_OPCODE(XXX, IMP),
-	///* 34 */	NEW_OPCODE(XXX, IMP),
-	///* 35 */	NEW_OPCODE(AND, ZPX),
-	///* 36 */	NEW_OPCODE(ROL, ZPX),
-	///* 37 */	NEW_OPCODE(XXX, IMP),
-	///* 38 */	NEW_OPCODE(SEC, IMP),
-	///* 39 */	NEW_OPCODE(AND, ABY),
-	///* 3A */	NEW_OPCODE(XXX, IMP),
-	///* 3B */	NEW_OPCODE(XXX, IMP),
-	///* 3C */	NEW_OPCODE(XXX, IMP),
-	///* 3D */	NEW_OPCODE(AND, ABX),
-	///* 3E */	NEW_OPCODE(ROL, ABX),
-	///* 3F */	NEW_OPCODE(XXX, IMP),
+	/* 30 */	NEW_OPCODE(BMI, REL, 2),
+	/* 31 */	NEW_OPCODE(AND, INDY, 5),
+	/* 32 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 33 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 34 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 35 */	NEW_OPCODE(AND, ZPX, 4),
+	/* 36 */	NEW_OPCODE(ROL, ZPX, 6),
+	/* 37 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 38 */	NEW_OPCODE(SEC, IMP, 2),
+	/* 39 */	NEW_OPCODE(AND, ABY, 4),
+	/* 3A */	NEW_OPCODE(XXX, IMP, 0),
+	/* 3B */	NEW_OPCODE(XXX, IMP, 0),
+	/* 3C */	NEW_OPCODE(XXX, IMP, 0),
+	/* 3D */	NEW_OPCODE(AND, ABX, 4),
+	/* 3E */	NEW_OPCODE(ROL, ABX, 7),
+	/* 3F */	NEW_OPCODE(XXX, IMP, 0),
 
-	///* 40 */	NEW_OPCODE(RTI, IMP),
-	///* 41 */	NEW_OPCODE(EOR, XIN),
-	///* 42 */	NEW_OPCODE(XXX, IMP),
-	///* 43 */	NEW_OPCODE(XXX, IMP),
-	///* 44 */	NEW_OPCODE(XXX, IMP),
-	///* 45 */	NEW_OPCODE(EOR, ZPG),
-	///* 46 */	NEW_OPCODE(LSR, ZPG),
-	///* 47 */	NEW_OPCODE(XXX, IMP),
-	///* 48 */	NEW_OPCODE(PHA, IMP),
-	///* 49 */	NEW_OPCODE(EOR, IMM),
-	///* 4A */	NEW_OPCODE(LSR, ACC),
-	///* 4B */	NEW_OPCODE(XXX, IMP),
-	///* 4C */	NEW_OPCODE(JMP, ABS),
-	///* 4D */	NEW_OPCODE(EOR, ABS),
-	///* 4E */	NEW_OPCODE(LSR, ABS),
-	///* 4F */	NEW_OPCODE(XXX, IMP),
+	/* 40 */	NEW_OPCODE(RTI, IMP, 6),
+	/* 41 */	NEW_OPCODE(EOR, INDX, 6),
+	/* 42 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 43 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 44 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 45 */	NEW_OPCODE(EOR, ZPG, 3),
+	/* 46 */	NEW_OPCODE(LSR, ZPG, 5),
+	/* 47 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 48 */	NEW_OPCODE(PHA, IMP, 3),
+	/* 49 */	NEW_OPCODE(EOR, IMM, 2),
+	/* 4A */	NEW_OPCODE(LSR, ACC, 2),
+	/* 4B */	NEW_OPCODE(XXX, IMP, 0),
+	/* 4C */	NEW_OPCODE(JMP, ABS, 3),
+	/* 4D */	NEW_OPCODE(EOR, ABS, 4),
+	/* 4E */	NEW_OPCODE(LSR, ABS, 6),
+	/* 4F */	NEW_OPCODE(XXX, IMP, 0),
 
-	///* 50 */	NEW_OPCODE(BVC, REL),
-	///* 51 */	NEW_OPCODE(EOR, INY),
-	///* 52 */	NEW_OPCODE(XXX, IMP),
-	///* 53 */	NEW_OPCODE(XXX, IMP),
-	///* 54 */	NEW_OPCODE(XXX, IMP),
-	///* 55 */	NEW_OPCODE(EOR, ZPX),
-	///* 56 */	NEW_OPCODE(LSR, ZPX),
-	///* 57 */	NEW_OPCODE(XXX, IMP),
-	///* 58 */	NEW_OPCODE(CLI, IMP),
-	///* 59 */	NEW_OPCODE(EOR, ABY),
-	///* 5A */	NEW_OPCODE(XXX, IMP),
-	///* 5B */	NEW_OPCODE(XXX, IMP),
-	///* 5C */	NEW_OPCODE(XXX, IMP),
-	///* 5D */	NEW_OPCODE(EOR, ABX),
-	///* 5E */	NEW_OPCODE(LSR, ABX),
-	///* 5F */	NEW_OPCODE(XXX, IMP),
+	/* 50 */	NEW_OPCODE(BVC, REL, 2),
+	/* 51 */	NEW_OPCODE(EOR, INDY, 5),
+	/* 52 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 53 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 54 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 55 */	NEW_OPCODE(EOR, ZPX, 4),
+	/* 56 */	NEW_OPCODE(LSR, ZPX, 6),
+	/* 57 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 58 */	NEW_OPCODE(CLI, IMP, 2),
+	/* 59 */	NEW_OPCODE(EOR, ABY, 4),
+	/* 5A */	NEW_OPCODE(XXX, IMP, 0),
+	/* 5B */	NEW_OPCODE(XXX, IMP, 0),
+	/* 5C */	NEW_OPCODE(XXX, IMP, 0),
+	/* 5D */	NEW_OPCODE(EOR, ABX, 4),
+	/* 5E */	NEW_OPCODE(LSR, ABX, 7),
+	/* 5F */	NEW_OPCODE(XXX, IMP, 0),
 
-	///* 60 */	NEW_OPCODE(RTS, IMP),
-	///* 61 */	NEW_OPCODE(ADC, XIN),
-	///* 62 */	NEW_OPCODE(XXX, IMP),
-	///* 63 */	NEW_OPCODE(XXX, IMP),
-	///* 64 */	NEW_OPCODE(XXX, IMP),
-	///* 65 */	NEW_OPCODE(ADC, ZPG),
-	///* 66 */	NEW_OPCODE(ROR, ZPG),
-	///* 67 */	NEW_OPCODE(XXX, IMP),
-	///* 68 */	NEW_OPCODE(PLA, IMP),
-	///* 69 */	NEW_OPCODE(ADC, IMM),
-	///* 6A */	NEW_OPCODE(ROR, ACC),
-	///* 6B */	NEW_OPCODE(XXX, IMP),
-	///* 6C */	NEW_OPCODE(JMP, IND),
-	///* 6D */	NEW_OPCODE(ADC, ABS),
-	///* 6E */	NEW_OPCODE(ROR, ABS),
-	///* 6F */	NEW_OPCODE(XXX, IMP),
+	/* 60 */	NEW_OPCODE(RTS, IMP, 6),
+	/* 61 */	NEW_OPCODE(ADC, INDX, 6),
+	/* 62 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 63 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 64 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 65 */	NEW_OPCODE(ADC, ZPG, 3),
+	/* 66 */	NEW_OPCODE(ROR, ZPG, 5),
+	/* 67 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 68 */	NEW_OPCODE(PLA, IMP, 4),
+	/* 69 */	NEW_OPCODE(ADC, IMM, 2),
+	/* 6A */	NEW_OPCODE(ROR, ACC, 2),
+	/* 6B */	NEW_OPCODE(XXX, IMP, 0),
+	/* 6C */	NEW_OPCODE(JMP, IND, 5),
+	/* 6D */	NEW_OPCODE(ADC, ABS, 4),
+	/* 6E */	NEW_OPCODE(ROR, ABS, 6),
+	/* 6F */	NEW_OPCODE(XXX, IMP, 0),
 
-	///* 70 */	NEW_OPCODE(BVS, REL),
-	///* 71 */	NEW_OPCODE(ADC, INY),
-	///* 72 */	NEW_OPCODE(XXX, IMP),
-	///* 73 */	NEW_OPCODE(XXX, IMP),
-	///* 74 */	NEW_OPCODE(XXX, IMP),
-	///* 75 */	NEW_OPCODE(ADC, ZPX),
-	///* 76 */	NEW_OPCODE(ROR, ZPX),
-	///* 77 */	NEW_OPCODE(XXX, IMP),
-	///* 78 */	NEW_OPCODE(SEI, IMP),
-	///* 79 */	NEW_OPCODE(ADC, ABY),
-	///* 7A */	NEW_OPCODE(XXX, IMP),
-	///* 7B */	NEW_OPCODE(XXX, IMP),
-	///* 7C */	NEW_OPCODE(XXX, IMP),
-	///* 7D */	NEW_OPCODE(ADC, ABX),
-	///* 7E */	NEW_OPCODE(ROR, ABX),
-	///* 7F */	NEW_OPCODE(XXX, IMP),
-}
\ No newline at end of file
+	/* 70 */	NEW_OPCODE(BVS, REL, 2),
+	/* 71 */	NEW_OPCODE(ADC, INDY, 5),
+	/* 72 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 73 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 74 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 75 */	NEW_OPCODE(ADC, ZPX, 4),
+	/* 76 */	NEW_OPCODE(ROR, ZPX, 6),
+	/* 77 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 78 */	NEW_OPCODE(SEI, IMP, 2),
+	/* 79 */	NEW_OPCODE(ADC, ABY, 4),
+	/* 7A */	NEW_OPCODE(XXX, IMP, 0),
+	/* 7B */	NEW_OPCODE(XXX, IMP, 0),
+	/* 7C */	NEW_OPCODE(XXX, IMP, 0),
+	/* 7D */	NEW_OPCODE(ADC, ABX, 4),
+	/* 7E */	NEW_OPCODE(ROR, ABX, 7),
+	/* 7F */	NEW_OPCODE(XXX, IMP, 0),
+
+	/* 80 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 81 */	NEW_OPCODE(STA, INDX, 6),
+	/* 82 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 83 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 84 */	NEW_OPCODE(STY, ZPG, 3),
+	/* 85 */	NEW_OPCODE(STA, ZPG, 3),
+	/* 86 */	NEW_OPCODE(STX, ZPG, 3),
+	/* 87 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 88 */	NEW_OPCODE(DEY, IMP, 2),
+	/* 89 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 8A */	NEW_OPCODE(TXA, IMP, 2),
+	/* 8B */	NEW_OPCODE(XXX, IMP, 0),
+	/* 8C */	NEW_OPCODE(STY, ABS, 4),
+	/* 8D */	NEW_OPCODE(STA, ABS, 4),
+	/* 8E */	NEW_OPCODE(STX, ABS, 4),
+	/* 8F */	NEW_OPCODE(XXX, IMP, 0),
+
+	/* 90 */	NEW_OPCODE(BCC, REL, 2),
+	/* 91 */	NEW_OPCODE(STA, INDY, 6),
+	/* 92 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 93 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 94 */	NEW_OPCODE(STY, ZPX, 4),
+	/* 95 */	NEW_OPCODE(STA, ZPX, 4),
+	/* 96 */	NEW_OPCODE(STX, ZPY, 4),
+	/* 97 */	NEW_OPCODE(XXX, IMP, 0),
+	/* 98 */	NEW_OPCODE(TYA, IMP, 2),
+	/* 99 */	NEW_OPCODE(STA, ABY, 5),
+	/* 9A */	NEW_OPCODE(TXS, IMP, 2),
+	/* 9B */	NEW_OPCODE(XXX, IMP, 0),
+	/* 9C */	NEW_OPCODE(XXX, IMP, 0),
+	/* 9D */	NEW_OPCODE(STA, ABX, 5),
+	/* 9E */	NEW_OPCODE(XXX, IMP, 0),
+	/* 9F */	NEW_OPCODE(XXX, IMP, 0),
+
+	/* A0 */	NEW_OPCODE(LDY, IMM, 2),
+	/* A1 */	NEW_OPCODE(LDA, INDX, 6),
+	/* A2 */	NEW_OPCODE(LDX, IMM, 2),
+	/* A3 */	NEW_OPCODE(XXX, IMP, 0),
+	/* A4 */	NEW_OPCODE(LDY, ZPG, 3),
+	/* A5 */	NEW_OPCODE(LDA, ZPG, 3),
+	/* A6 */	NEW_OPCODE(LDX, ZPG, 3),
+	/* A7 */	NEW_OPCODE(XXX, IMP, 0),
+	/* A8 */	NEW_OPCODE(TAY, IMP, 2),
+	/* A9 */	NEW_OPCODE(LDA, IMM, 2),
+	/* AA */	NEW_OPCODE(TAX, IMP, 2),
+	/* AB */	NEW_OPCODE(XXX, IMP, 0),
+	/* AC */	NEW_OPCODE(LDY, ABS, 4),
+	/* AD */	NEW_OPCODE(LDA, ABS, 4),
+	/* AE */	NEW_OPCODE(LDX, ABS, 4),
+	/* AF */	NEW_OPCODE(XXX, IMP, 0),
+
+	/* B0 */	NEW_OPCODE(BCS, REL, 2),
+	/* B1 */	NEW_OPCODE(LDA, INDY, 5),
+	/* B2 */	NEW_OPCODE(XXX, IMP, 0),
+	/* B3 */	NEW_OPCODE(XXX, IMP, 0),
+	/* B4 */	NEW_OPCODE(LDY, ZPX, 4),
+	/* B5 */	NEW_OPCODE(LDA, ZPX, 4),
+	/* B6 */	NEW_OPCODE(LDX, ZPY, 4),
+	/* B7 */	NEW_OPCODE(XXX, IMP, 0),
+	/* B8 */	NEW_OPCODE(CLV, IMP, 2),
+	/* B9 */	NEW_OPCODE(LDA, ABY, 4),
+	/* BA */	NEW_OPCODE(TSX, IMP, 2),
+	/* BB */	NEW_OPCODE(XXX, IMP, 0),
+	/* BC */	NEW_OPCODE(LDY, ABX, 4),
+	/* BD */	NEW_OPCODE(LDA, ABX, 4),
+	/* BE */	NEW_OPCODE(LDX, ABY, 4),
+	/* BF */	NEW_OPCODE(XXX, IMP, 0),
+
+	/* C0 */	NEW_OPCODE(CPY, IMM, 2),
+	/* C1 */	NEW_OPCODE(CMP, INDX, 6),
+	/* C2 */	NEW_OPCODE(XXX, IMP, 0),
+	/* C3 */	NEW_OPCODE(XXX, IMP, 0),
+	/* C4 */	NEW_OPCODE(CPY, ZPG, 3),
+	/* C5 */	NEW_OPCODE(CMP, ZPG, 3),
+	/* C6 */	NEW_OPCODE(DEC, ZPG, 5),
+	/* C7 */	NEW_OPCODE(XXX, IMP, 0),
+	/* C8 */	NEW_OPCODE(INY, IMP, 2),
+	/* C9 */	NEW_OPCODE(CMP, IMM, 2),
+	/* CA */	NEW_OPCODE(DEX, IMP, 2),
+	/* CB */	NEW_OPCODE(XXX, IMP, 0),
+	/* CC */	NEW_OPCODE(CPY, ABS, 4),
+	/* CD */	NEW_OPCODE(CMP, ABS, 4),
+	/* CE */	NEW_OPCODE(DEC, ABS, 6),
+	/* CF */	NEW_OPCODE(XXX, IMP, 0),
+
+	/* D0 */	NEW_OPCODE(BNE, REL, 2),
+	/* D1 */	NEW_OPCODE(CMP, INDY, 5),
+	/* D2 */	NEW_OPCODE(XXX, IMP, 0),
+	/* D3 */	NEW_OPCODE(XXX, IMP, 0),
+	/* D4 */	NEW_OPCODE(XXX, IMP, 0),
+	/* D5 */	NEW_OPCODE(CMP, ZPX, 4),
+	/* D6 */	NEW_OPCODE(DEC, ZPX, 6),
+	/* D7 */	NEW_OPCODE(XXX, IMP, 0),
+	/* D8 */	NEW_OPCODE(CLD, IMP, 2),
+	/* D9 */	NEW_OPCODE(CMP, ABY, 4),
+	/* DA */	NEW_OPCODE(XXX, IMP, 0),
+	/* DB */	NEW_OPCODE(XXX, IMP, 0),
+	/* DC */	NEW_OPCODE(XXX, IMP, 0),
+	/* DD */	NEW_OPCODE(CMP, ABX, 4),
+	/* DE */	NEW_OPCODE(DEC, ABX, 7),
+	/* DF */	NEW_OPCODE(XXX, IMP, 0),
+
+	/* E0 */	NEW_OPCODE(CPX, IMM, 2),
+	/* E1 */	NEW_OPCODE(SBC, INDX, 6),
+	/* E2 */	NEW_OPCODE(XXX, IMP, 0),
+	/* E3 */	NEW_OPCODE(XXX, IMP, 0),
+	/* E4 */	NEW_OPCODE(CPX, ZPG, 3),
+	/* E5 */	NEW_OPCODE(SBC, ZPG, 3),
+	/* E6 */	NEW_OPCODE(INC, ZPG, 5),
+	/* E7 */	NEW_OPCODE(XXX, IMP, 0),
+	/* E8 */	NEW_OPCODE(INX, IMP, 2),
+	/* E9 */	NEW_OPCODE(SBC, IMM, 2),
+	/* EA */	NEW_OPCODE(NOP, IMP, 2),
+	/* EB */	NEW_OPCODE(XXX, IMP, 0),
+	/* EC */	NEW_OPCODE(CPX, ABS, 4),
+	/* ED */	NEW_OPCODE(SBC, ABS, 4),
+	/* EE */	NEW_OPCODE(INC, ABS, 6),
+	/* EF */	NEW_OPCODE(XXX, IMP, 0),
+
+	/* F0 */	NEW_OPCODE(BEQ, REL, 2),
+	/* F1 */	NEW_OPCODE(SBC, INDY, 5),
+	/* F2 */	NEW_OPCODE(XXX, IMP, 0),
+	/* F3 */	NEW_OPCODE(XXX, IMP, 0),
+	/* F4 */	NEW_OPCODE(XXX, IMP, 0),
+	/* F5 */	NEW_OPCODE(SBC, ZPX, 4),
+	/* F6 */	NEW_OPCODE(INC, ZPX, 6),
+	/* F7 */	NEW_OPCODE(XXX, IMP, 0),
+	/* F8 */	NEW_OPCODE(SED, IMP, 2),
+	/* F9 */	NEW_OPCODE(SBC, ABY, 4),
+	/* FA */	NEW_OPCODE(XXX, IMP, 0),
+	/* FB */	NEW_OPCODE(XXX, IMP, 0),
+	/* FC */	NEW_OPCODE(XXX, IMP, 0),
+	/* FD */	NEW_OPCODE(SBC, ABX, 4),
+	/* FE */	NEW_OPCODE(INC, ABX, 7),
+	/* FF */	NEW_OPCODE(XXX, IMP, 0)
+};
\ No newline at end of file